New Fabrication Process Paves Way For Next
Generation All-Digital Transceiver Capable Of Operation In Excess Of 80 GHz
Clock SpeedElmsford, NY, November
7: HYPRES Inc., a
leading developer of superconducting microelectronics (SME) technology,
recently achieved a major milestone when it successfully tested fabricated
integrated circuits featuring a critical current density of 20 kiloamps per
square centimeter (kA/cm2). The achievement—which represents the third
generation of HYPRES’ integrated circuit fabrication process—paves the way
for the company to build an all-digital transceiver capable of operation in
excess of 80 GHz clock speeds.
Several rapid single flux quantum (RSFQ)
digital circuits were fabricated and successfully tested, among them, a 325
GHz (speed) digital frequency divider, a 4-bit binary counter, and various
input/output elements.
“This is an outstanding achievement for our
team and really demonstrates how quickly our technology is maturing,” said
Richard Hitt, president and CEO of HYPRES. “The credit goes to Dr. Sergey
Tolpygo and HYPRES’ team of dedicated engineers and scientists who worked so
diligently on this initiative.”
These test results show that even with our
swift pace of progress we’re just scratching the surface of the outstanding
performance levels this technology has to offer the world of wireless
communications,” Hitt said. “The next few years are going to be very
exciting as digital superconducting transceivers, switches and processors
make an impact on everyday communications.”
In digital superconductivity, critical
current density directly impacts clock speed. The higher the critical
current density factor, the faster the chip, resulting in higher performance
direct conversion all-digital transceivers.
HYPRES previously implemented a 4.5 kA/cm2
critical currently density fabrication process to develop an all-digital
transceiver that could operate at a 40 GHz clock rate. These chips utilize
Josephson junctions approximately 1.5 micron x 1.5 micron in size. This new
20 kA/cm2 process now paves the way for the company to make smaller, and
therefore faster, Josephson junctions that will allow its all-digital
transceiver to operate at an 80 GHz clock.
The company developed this new fabrication
process with support from the U.S. Office of Naval Research (ONR). The
company has received numerous contracts from the ONR in its development of
the all-digital transceiver.
The U.S. military is interested in an 80 GHz
clock all-digital transceiver in order to meet its growing communications
challenges—where harsh operating environments, expanding performance
requirements, and extreme technology gaps are the norm, and where the
benefits of digital superconductivity offer tremendous opportunity.
As commercial wireless applications become
more complex—via software defined radio, so-called “cognitive radio” and
other technical advancements—HYPRES will develop its technology to meet this
sector’s needs as well.
HYPRES team members who participated on this
initiative included Sergey Tolpygo, Ph.D., director of fabrication, Alex
Kirichenko, Senior Circuit Designer, Daniel Yohannes, Anubhav Sahu, Rick
Hunt, John Vivalda, and David Donnelly.
For more information on HYPRES visit
www.hypres.com.
